Synopsys, Inc. seeks an experienced ASIC physical design engineer based in Sunnyvale, CA. You will tackle RTL-to-GDSII flows, mentor teams, and lead timing closure on advanced nodes while engaging directly with customers and ensuring successful tape-outs. The role requires deep tool proficiency, collaboration with product teams, and travel up to 30% to customer sites, with a focus on delivering measurable PPA improvements. #J-18808-Ljbffr
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